Importance of Stencil for PCB Assembly

The surface mount assembly process uses a stencil as a gateway to an accurate and repeatable solder paste deposition. A stencil is a thin sheet or foil of brass or stainless steel with a circuit pattern cut into it, matching the positional pattern of surface mount devices (SMD) on the printed circuit board (PCB) for which the stencil is to be used. After accurately positioning and matching the stencil over the PCB, a metal squeegee forces solder paste through the apertures of the stencil to form deposits on the PCB for holding SMDs in place. The solder paste deposits, when passed through the reflow oven, melt and secure the SMDs to the PCB.
The design of the stencil, especially its composition and thickness and the shape and size of its apertures, determines the size, shape, and positioning of the solder paste deposits and this is crucial to ensuring a high-yield assembly process. For instance, the foil thickness and the aperture opening size define the volume of paste deposited on the board. An excess of solder paste causes balling, bridging, and tomb-stoning. Low amounts of solder paste cause dry solder joints. Both compromise the electrical functionality of the board.
Optimum Foil Thickness
The types of SMDs on the board define the optimum foil thickness. For instance, component packages such as 0603 or SOICs with a 0.020” pitch require rather thin solder paste stencils, whereas a thicker stencil is more suitable for components such as 1206 or SOICs of 0.050” pitch. Although stencil thickness for solder paste deposition ranges from 0.001” to 0.030”, the typical foil thickness that a majority of boards use ranges from 0.004” to 0.007”.
Technologies for Making Stencils
At present, the industry uses five technologies for making stencils—laser-cut, electroformed, chemically etched, and hybrid. While the hybrid technology is a combination of chemical etching and laser-cutting, chemical etching is very useful for making step stencils and hybrid stencils.
Chemical Etching for Stencils
Chemical milling etches metal masks and flexible metal mask stencils from both sides. As this etches not only in the vertical direction but also laterally, it causes undercutting, and makes the openings larger than desired. As the etching proceeds from two sides, the tapering on the straight wall causes the formation of an hourglass shape, leading to extra deposits of solder.
As etching the stencil openings does not produce a smooth result, the industry uses two methods for smoothening the walls. One of them is electropolishing, a microetchng process, and the other is nickel plating.
Although a smooth or polished surface helps paste release, it may also cause the paste to skip the surface of the stencil rather than roll with the squeegee. Stencil manufacturers address this problem by polishing the aperture walls selectively, but not the stencil surface. While nickel plating improves stencil smoothness and the printing performance, it reduces the aperture opening, which requires artwork adjustment.
Laser Cutting for Stencils
Laser cutting is a subtractive process, where Gerber data is fed to a CNC machine that controls the laser beam. The laser beam starts from inside the boundary of the aperture and traverses to its perimeter, while completely removing the metal to form the apertures, one aperture at a time.
Several parameters define the smoothness of the laser cut. This includes cutting speed, beam spot size, laser power, and beam focus. Typically, the industry uses a beam spot of about 1.25 mils, which cuts very accurate aperture sizes over a wide range of shape and size requirements. However, laser cut apertures also require post-processing treatments just as chemically etched apertures do. Laser cut stencils require electropolishing and nickel plating to smoothen the inside walls of the aperture. As the aperture size reduces during the latter process, the laser cut aperture size must be suitably compensated.
Aspects of Printing with a Stencil
Printing with a stencil involves three distinct processes. The first is the aperture-fill process where the solder paste fills the aperture. The second is the paste transfer process, where the paste accumulated in the aperture transfers to the PCB surface, and the third is the positional location of the deposited paste. The three processes are vital to achieving the desired result—depositing a precise volume of solder paste (also called a brick) to the correct location on the PCB.
Filling the stencil aperture with solder paste requires a metal squeegee blade forcing the solder paste into the aperture. The orientation of the aperture with respect to the squeegee blade affects the fill process. For instance, apertures oriented with their short axis in the direction of the blade stroke fill better compared to those with their long axis oriented to the blade stroke. Additionally, as squeegee speed influences aperture fill, lower squeegee speeds achieve better fills for apertures with their long axes oriented parallel to the stroke of the squeegee.
The edge of the squeegee blade also influences the way the paste fills the aperture of a stencil. The usual practice is to print applying minimum squeegee pressure while maintaining a clean wipe of the solder paste on the stencil surface. Increasing the squeegee pressure may damage both the squeegee blade and the stencil, while also causing paste smearing below the stencil surface.
On the other hand, lower squeegee pressure may not allow release of paste through a small aperture, resulting in insufficient solder on the PCB pad. Additionally, paste left on the side of the squeegee near large apertures will likely be pulled down by gravity, resulting in deposition of excess solder. Therefore, a minimum amount of pressure is necessary, which will achieve a clean wipe of the paste.
The amount of pressure to be applied also depends on the type of solder paste being used. For instance, Teflon/nickel-coated squeegee blades require about 25-40% more pressure when using lead-free solder paste than that required for tin/lead paste.
Performance Issues with Solder Paste and Stencils
Certain performance issues related to solder paste and stencils are:
  • Thickness of the stencil foil and the aperture size determine the potential volume of solder paste deposited on the PCB pads
  • The ability of the solder paste to release from the aperture walls of the stencil
  • Positional accuracy of the solder brick printed on the PCB pad
During the print cycle, as the squeegee blade travels across the stencil, solder paste fills the stencil aperture. During the board/stencil separation cycle, the paste releases to the pads on the board. Ideally, all the paste that filled the aperture during the print process should have released from the aperture walls and transferred to the pad on the board, forming a complete solder brick. However, this transfer amount depends on the aspect ratio and area ratio of the aperture.
For instance, with an area of the pad greater than two-thirds the area of the inside aperture wall, the paste can achieve a release of better than 80%. This means reducing the stencil thickness or increasing the aperture size can give a better paste release with the same area ratio.
The ability of the solder paste to release from the aperture walls of the stencil also depends on the finish of the aperture walls. With electropolished and/or electroplated laser-cut apertures, the paste transfer efficiency improves. However, transfer of solder paste from the stencil to the PCB also depends on the adhesion of the paste to the aperture walls of the stencil and on the adhesion of the paste to the pad on the PCB. For a good transfer the latter should be greater, which means the printability depends on the ratio of the stencil wall area to the open face area, while ignoring minor influences such as the draft angle of the wall and its roughness.
The positional and dimensional accuracy of the solder brick printed on the PCB pad depends on the quality of the transferred CAD data, the technology and methods used to manufacture the stencil, and the temperature of the stencil during its use. Moreover, the positional accuracy also depends on the alignment methods used.
Framed Stencils or Glue-In Stencils
Framed stencils are the strongest form of laser-cut stencils available and are designed for high-volume screen-printing during production runs. These are permanently mounted in a stencil frame with a mesh border tightly stretching the stencil foil taut in the frame. Framed stencils with smooth aperture walls are recommended for Micro BGAs and for components with 16 Mil pitch and below. Framed stencils offer the best positional and dimensional accuracy when used under controlled temperature conditions.

Fig.3: Framed Stencil

Frameless Stencils

For short runs or prototype PCB assembly, frameless stencils offer optimum solder paste volume control. They are designed to work with a stencil tensioning system, which are reusable stencil frames such as universal frames. As the stencils are not permanently glued into a frame, they are significantly cheaper than framed stencils and take up considerably lower storage space.
For achieving good printing results with a stencil, a variety of factors must form a right combination. These include:

  • The right paste material—correct metal content, viscosity, the largest powder size, and lowest possible flux activity
  • The right tools—proper stencil, printer, and squeegee blade
  • The right process—good registration, and clean sweep.

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Taking Care of Warpage and Thermal Profile Issues during Assembly

A warped printed circuit board (PCB) is one that does not sit true on a flat desktop. Although there are several reasons as to why this should happen, there are two specific causes that cause board warping. One of them is layout related, while the other is process related. If the PCB is found to be warped before the start of assembly, the problem has occurred between layout and fabrication. If the PCB was flat before, but was found warped after assembly, then the problem is likely between fabrication and assembly. However, some fabrication problems will not show up until the PCB has passed through the reflow oven.

Fig.1: Warped PCB

Settling on the root cause is generally an iterative process. To discuss the issue with the fabrication or assembly shop, collecting some additional information is necessary. This could be the amount of warpage per inch, size of the board, and its thickness. Along with this information, it may be necessary to consider copper pours, placement of components, and their sizes, provided the board design is in-house.

With the above information, a discussion with the design house, fabrication, or the assembly shop may serve to highlight the issue and cause of the warpage. Once the design issue is ruled out, it may be necessary to determine if it relates to fabrication or assembly, which leads to the next step of determining a solution to the problem.

Design Issues Contributing to Warping

There can be several obscure design issues contributing to PCB warping. To be able to eliminate them before moving over to fabrication or assembly, it is necessary to know the major design contributors:

  • Odd shapes or large cutouts—can cause considerable warping at any stage
  • Thin board—related to number and size of components can lead to warping after assembly
  • Heavy components grouped together—can cause warping during assembly. The thermal mass acts like a heat sink does, leading to uneven expansion and non-even soldering on the PCB
  • Uneven copper pour—although copper and Polyimide/FR-4 are matched for thermal expansion, the matching is not exact. The dissimilarity is magnified for a large copper pour on one side or on a corner, leading to warping either during fabrication or during assembly. This may require the designer change over the solid copper pour to crosshatch for reducing the warpage.

Fig.2: Solid Copper Pour & Crosshatch

Assembly Related Issues Contributing to Warping

Polyimide and FR-4 both absorb moisture from the environment. If a stack of bare boards have been stored for some time before assembly, it is customary to bake them for at least 3 hours at 80-150°C to drive out the moisture. Assembly can start once they are cooled to room temperature. Some board suppliers vacuum seal their products with a desiccant before shipping, and if the complete package is not consumed in one assembly run, it is necessary to reseal the balance along with the desiccant.

Warping in large boards may be related to the orientation as the boards enter the reflow oven. Placing the larger dimension parallel to the conveyor of the oven can prevent uneven heating between the edge of the PCB and its middle. Large boards may require additional support at the center of the PCB, and adding carriers may be necessary. Similar support may also be required for flexible PCBs during reflow.

Fig.3: Breakaway PCB

Fig.4: V-Groove on PCB

Often small PCBs are grouped together to form panels for more efficient assembly. After assembly, operators manually separate them into individual PCBs. Manufacturers follow two methods for easing the process of separation—breakaway and v-scoring. In breakaway, most of the material between the smaller PCBs is cut away, leaving them joined by only small lands. If the panelization is large, these cutouts could lead to warping. V-scoring is an alternative method where instead of removing a part of the PCB, a v-shaped groove forms the separation line. This prevents warping of the panel during assembly, but allows the operators to separate the boards easily.

Fig.5: Reflow Oven

Although 3-zone reflow ovens were adequate for tin/lead soldering, with the advent of RoHS processes and lead-free soldering, reflow ovens operate at higher temperatures. Moreover, to reduce thermal shock to the PCB and components when in reflow, the temperature is gradually built up over several zones, sometimes as many as six to nine—with greater possibilities of error in the settings in one or more of the zones.

Warping may also be caused by oven loading. If the thermal profiling for a specific PCB was done for a certain number of boards in the reflow oven at the same time, the oven temperature may rise when in a subsequent run the number of boards is smaller. As the number of boards in the oven influences the thermal load, the thermal demand may not be adequate to maintain the typical reflow profile for the smaller batch of PCBs.

Clogging of airflow outlets of the reflow oven may also cause a change in the temperature-time profile for a specific PCB, resulting in uneven heating and consequently to warping. Likewise, clogging of orifice plates due to flux accumulation may also limit the forced convection flow, causing the boards to heat up unevenly.

Preventing Warping of PCBs

For PCBs meant for surface mount technology, the IPC-6012 standard defines the maximum camber and twist or warping to 0.75%, while for other types (through-hole technology) this is relaxed to 1.5%. However, most electronic assembly plants dealing with double/multilayer boards prefer to limit warping to between 0.7 and 0.75%. Rigid PCBs with thicknesses of around 1.6 mm and using SMDs and BGAs can only stand warping to the extent of 0.5%, while others using PoP can handle warpages of only 0.3% or less.

Storing PCBs properly before assembly is crucial in preventing warpage. Stacking PCBs on their edge cannot guarantee they will be vertical all the while, and the combined weight of the PCBs will ultimately cause a camber. Therefore, storing them horizontally on a flat surface is essential.

It is usual for PCBs to absorb moisture from the surroundings. Storing them in an area where the temperature and humidity is under control is the ideal solution. Where it is impractical to control the environment within the entire store, use of desiccants to control the moisture within a sealed container may also help in preventing PCBs from acquiring moisture during storage.

As PCB fabricators use heat to form multilayer boards, re-application of heat to warped bare boards should be helpful in straightening them as well. This may require heavy-pressing the boards between heated smooth steel plates for 3 to 6 hours and baking the PCBs 2 to 3 times.

What Are Vias And Why Do You Need Them?

Just as a printed circuit board (PCB) is a means to allow interconnection of different components, vias are means to interconnect different layers on and within the multilayered PCBs. Also, just like there are various types of PCBs, there are multiple types of vias with their own functionality. Simply put, vias are Plated-Through Holes (PTHs) passing through one or more layers in a PCB, connecting traces on its way. IPC defines seven types of vias in IPC-50M, Terms and Definitions for Interconnecting and Packaging Electronic Circuits. These are:
Type I: Tented Vias—vias that have a mask material applied, bridging over them, with no additional material inside the holes.
Type II: Tented and Covered Vias—type I vias with a secondary covering of mask material over and above the tented vias.
Type III: Plugged Vias—vias with material partly penetrating into the via holes.
Type IV: Plugged and Covered Vias—type III vias with a secondary material covering the vias.
Type V: Filled Vias—vias with material fully penetrating and encapsulating the via holes.
Type VI: Filled and Covered—type V vias with a secondary material covering the vias.
Type VII: Filled and Capped—type V vias with a secondary metalized coating covering the vias.
                                                            Fig. 1: Close-up of a Via
Although small and sometimes very small, vias are extremely important parts of the circuit board landscape. In fact, in the world of surface mount components, vias are the only means to interconnect copper traces on different layers on a PCB, where earlier, leads of components would do the job when soldered on both sides of a two-layer PCB. The only difference between plated-through holes and vias is no component lead will ever pass through the hole of a via.
                                                        Fig. 2: Different Types of Vias
Each of the seven types of vias classified above may be further subdivided into three types depending on their functionality—blind or hidden vias, buried vias, and through hole vias. As the name suggests, through hole vias travel through the board, connecting traces on the outermost layers, and if required, on the inner layers as well. Blind vias start on the surface on one side of the board, but do not extend to the other side, finishing on one of the internal layers instead. Buried vias remain completely encapsulated within the board, and none of their ends extend to any of the outer surfaces of the board.
Most vias in high-density boards have very small-diameter holes, and are called micro-vias. Manufacturers use different tools such as ultrasonic beams and lasers to drill these holes. Usually, micro-vias are filled with a conductive material to facilitate connecting with the pad on the other layer. However, this can lead to issues with unequal expansion as explained later.
Tented Vias
                                                                  Fig. 3: Tented Vias
The word “tenting” in the PCB industry originally meant the solder mask would enclose the via fully in the form of a skin or tent over the hole. This was difficult for manufacturers to achieve with liquid photo-imageable (LPI) solder mask, as the success of the process was dependent on the diameter of the hole and surface tension of the LPI. With the introduction of dry film solder mask, manufacturers achieved tenting easily, but the process was more expensive.
With LPI, tenting caused the mask to cover the pad and enter the hole partly. However, this was not consistent, as some vias remained unplugged, and others had the tent broken over the hole, covering only the annular ring or pad. Therefore, as per requirement, manufacturers resorted to plugging vias with conductive or non-conductive materials before tenting with LPI.
Tenting is useful for reducing the number of exposed conductive pads present on the PCB, and helps in reducing the likelihood of shorts from solder bridging during the assembly process. In the case of SMT pads, tenting helps to reduce paste migration away from the pads of SMD components when vias are placed either on the ends of their pads or on the dog-bones meant for BGAs.
Additionally, tenting is helpful whenever vias are placed close to SMT pads, especially in areas within the BGA package, where shorts can easily happen under the component during reflow, making rework difficult and time-consuming. Covering the tented via with a secondary coating of solder mask often helps,
Disadvantages of Incomplete Tenting
                                                             Fig. 4: Incomplete Tenting
Although tenting of vias by primary LPI solder mask is advantageous as it is only a single step process, the process cannot guarantee complete tenting, resulting in long-term reliability issues. Successful tenting by screen coating depends on the size of the hole, surface tension of the liquid mask, and the board thickness. As no surface finish is applied to the via barrel before tenting, incomplete tenting may cause entrapments. Usually, this is chemical entrapment from preclean lines when enhancing surface finish.
Preclean lines subject surface finishes to a micro-etching process, allowing micro-etchants to be trapped in the open vias, where the chemical crystallizes rapidly to generate copper-sulfate crystals. Over time, these crystals etch away the copper in the barrel, causing long-term reliability issues. For instance, the gold of the ENIG finish could form a galvanic cell with the exposed copper near the top of the via in the presence of the micro-etchant chemical, thereby accelerating the process of etching.
Incomplete tenting may also cause solder paste to wick into the via, leaving insufficient paste to complete the actual soldering. In the case of BGAs, localized thermal energy may cause the LPI solder mask to lift between the ball and the via capture pads, as the distance between them is very short, causing solder shorts.
Above issues with incomplete tenting has led to manufacturers plugging vias with solder mask or some other non-conductive or even conductive materials. The plugged via does not require surface finish to be applied to the via barrel, but does ensure that subsequent application of the LPI mask leaves all the vias fully tented.
Vias Plugged with Non-Conductive Fill
For vias plugged with solder mask or similar non-conductive epoxy material, the manufacturer has to ensure the via is completely plugged and sealed, and its annular ring is fully covered. This is a common practice when using BGA SMD pads to prevent solder wicking into the via creating poor or non-existent solder joints.
                                                               Fig. 5: Active Pad
However, with BGA packages becoming tighter, it is becoming increasingly difficult placing vias on standard ‘dog-bone’ land patterns for transferring signals to other layers. This difficulty has led to vias being drilled directly into the pads of the BGA footprint. The process is known as via-in-pad, and allows much simpler routing. Although this requires the via hole to be fully plugged, it also requires the surface of the plugged via to be plated over with copper, and subsequently flattened and planarized to be even with the surrounding copper features. Therefore, with the application of the final finish, there is a solderable surface mount pad, also called an active pad, capable of passing signals to inner layers, eliminating the need to place vias on the surface layer for the purpose.
Vias Plugged with Conductive Fill
Some chips generate a lot of heat, which must be conducted away to prevent the chip from overheating. Placing thermal vias plugged with conductive fill under the chip helps in the process, as the metallic nature of the fill naturally wicks the heat away from the chip to the other side of the board, just as a radiator does. This technique is helpful even in cases where a chip draws high currents, as multiple vias plugged with conductive fill reduce the resistance of the track, thereby lowering the voltage drop between the voltage source and the pins of the chip.
Drawbacks of Conductive Fills
Vias filled with conductive fill generally present a different coefficient of thermal expansion (CTE) between the surrounding laminate and the metallic fill. With heat, metals expand much more rapidly than the surrounding laminate does, leading to a possible fracture between the pads and the hole wall. Therefore, where the purpose of the fill is only to reinforce the copper pad plated over the hole, designers using via-in-pad do not recommend the conductive filling process.
Designers often try to match the CTE of the conductive fill for vias with that of the surrounding material. This is important in the view of the board living out its life in a heating/cooling state, where the expansion and contraction of the materials can lead to stress fractures in vias and possible electrical opens in the worst cases. However, this consideration generally favors the non-conductive epoxies for via filling as their CTE matches that of the laminate more closely, making the PCB a more reliable product.
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