Relationship between Solder Wicking and Surface Finish

During reflow, the solder paste may tend to wet the component termination rather than both the printed circuit board (PCB) pad and the lead, as it should do normally. This phenomenon is called solder wicking, and the main reason for this is the slow wetting of the pad or a much faster wetting of the termination.

Fig.1: Mechanism of Solder Wicking

Faster Wetting of the Termination

The reflow profile or the soldering process is the main cause of faster wetting of the component lead. For instance, vapor phase can allow the leads to reach soldering temperatures much before the surface of the PCB can. Another contributor to wicking is the old tin/lead coated termination in a lead-free process. As the melting point of tin/lead coating is lower, the surface coating wets very quickly. The result literally sucks solder up the lead before it can even start to wet the pad on the PCB. Although in most cases the joint is satisfactory, larger component leads may carry the solder up, creating incomplete joints.

Slow Wetting on the Pad

Most lead-free alloys have reduced wetting characteristics, and the alternative surface finishes exaggerate these characteristics. Manufacturers improve the solderability performance of the PCB surface by coating them with other metals. A coating of solder offers the best solderability, followed by gold, silver, tin, and copper OSP. Of course, this is based on the specification, quality, and consistency of the finish provided. Several factors may contribute to the degree of surface coverage. Engineers need to optimize their reflow process for obtaining the best performance from the PCB.

Surface Finish Affects Wetting

In general, the amount of lead-free solder wicking depends on the surface finish of the pad and the finish of the component lead. This may result in unsoldered areas and may result in solder displacement to areas close to the joint with the potential to create shorts. De-wetting may also cause solderability problems, where solder joints can be made and then destroyed by inappropriate soldering conditions.

Usually, manufacturers preserve the solderable surface of the PCB using a surface finish or coating as the PCB moves from manufacturing to assembly. The most common surface finishes offering the best solderability are, in order of preference, Hot Air Solder Leveling or HASL, Electroless Nickel/Immersion Gold or ENIG, Immersion Silver or ImAg, Immersion Tin or ImSn, and Organic Solderability Preservatives or OSP.

HASL—Hot Air Solder Leveling

Fig.2: Hot Air Solder Levelling

As a solder coating, HASL is available for both lead and lead-free PCBs. The application process involves pre-cleaning the exposed copper surface, preheating it, and flux coating it, before giving it a coating of solder. Excess solder is removed and the surface leveled by a hot-air knife. Typical thickness of the HASL layer is usually about 100-500 micro-inches.

Although HASL offers long shelf life, reliability, and very good solderability due to its short wetting time, it can lead to several undesired side effects. HASL may cause uneven surfaces or planarity issues and PTH diameter issues and bridging for fine pitch prints. The PCB may face a thermal shock due to the HASL process, and this may cause PCB warpage.

ENIG—Electroless Nickel/Immersion Gold

Fig.3: Electroless Nickel/Immersion Gold

This is a plating of nickel over the exposed copper pad and a plating of gold over the nickel surface. The application process involves cleaning the exposed copper surface with micro-etching and depositing the electroless nickel over it. A plating of immersion gold then covers the nickel surface. The typical thickness of the nickel layer is 50-150 micro-inches, while the gold thickness is about 3-10 micro-inches.

As the gold surface does not oxidize, it offers long shelf life and good wettability and solderability. However, there are side effects also, such as nickel corrosion leading to black pads, and thick gold surface causing embrittlement. Additionally, slow intermetallic growth of nickel may lead to poor joint strength and reliability. ENIG is an expensive and complicated process, which, if not done right may aggravate non-wetting issues.

ImAg—Immersion Silver

Fig.4: Immersion Silver

Immersion silver of 3-12 micro-inch thickness covers the exposed copper pad on the PCB, which has been cleaned and micro-etched prior to the application of the immersion silver.

Although immersion silver finish is low cost and produces a planar surface of high conductivity, it is subject to creep corrosion, planar micro voids, migration of silver, and tarnishes easily.

ImSn—Immersion Tin

Fig.5: Immersion Tin

Manufacturers often protect the exposed copper pads on the PCB with a deposit of a thin layer of immersion tin. This low cost protection is low cost and produces a uniform surface of good solderability. However, many solder mask materials and plating chemicals attack immersion tin. Tin forms whiskers, which tend to create shorts, and it also forms solid state IMC.

OSP—Organic Solderability Preservatives

Fig.6: Organic Solderability Preservatives

OSP is a transparent organic material coating, which manufacturers use to prevent the exposed copper pads from tarnishing. The applied thickness is usually 0.3-0.5 microns, and it forms an intermetallic bond with the copper surface.

The OSP application process is low cost, easy, and short. Although it produces a flat planar surface of good reliability, it produces the least solderability among all the above surface finishes. It has a short shelf life, and does not withstand multiple reflows.

Solving Solder Wicking in Reflow Soldering

Fig.7: Actual Solder Wicking

As soldering is a complex science, various soldering processes have some common underlying issues and a few unique ones that need to be overcome for achieving a good solder joint. Solder wicking is one such serious problem where the issue is of solder climbing up on to the lead of a component. The root cause and mechanism of solder wicking are:

  • The lead reaching the liquidus temperature before the pad does, tightens up the molten solder completely
  • The hotter surface attracts the solder alloy, provided there is sufficient wettability
  • Solder on the leads melts faster than on the solder joint—the enhanced liquefaction of solder at the lead pulls the melting solder paste away from the pads
  • Wicking-up is aided by all non-wetting problems such as plating too thin, contamination/oxidation, or surface treatment

Experiments with 8-zone reflow ovens have demonstrated good solutions to the problem of solder wicking. Most effective settings for the oven were five pre-heat zones, and three peak zones, along with forced convection airflows. Such reflow ovens were capable of suitably processing very complex boards with optimum process stability and offered unmatched reproducibility.

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Impact of Quality of PCBs on Assembly and Product Life Cycle

Irrespective of whether the electronic product is a next generation computer system or a simple mobile handset, inside it there is a printed circuit board (PCB). Engineers design PCBs to support and connect electronic components and other hardware inside the product. The PCB usually has conductive pathways holding the electronic components together by soldering, a process for attaching different metals such as tin, silver, gold, and copper together. The process also serves to interconnect all hardware within the product.
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Fig.1: Printed Circuit Board
Printed Circuit Boards (PCBs) must meet three basic requirements to be acceptable for assembly, and to establish products with longevity. According to Clyde Coombs, the author of “The Printed Circuits Handbook,” these three basic requirements are:
  • The physical form of the PCB should match its intended design. Dimensions and placement of interconnection points and the coating on these interconnection points must allow proper component assembly
  • The PCB must provide proper interconnection between components
  • The circuit board must provide adequate insulation between interconnection points that are not to be connected
The above three items must be acceptable and remain of high quality all through the expected life of the product. As there can be several details related to the three requirements, defining the requirement for acceptability and quality for the PCB suppliers is essential to ensure they meet the three requirements. Properly implemented, the quality and acceptance criteria provide all parties a clear picture of the expectations.
Industrial Standards for PCBs
Conforming to industrial standards has the advantage of establishing a common foundation—creating level playing fields—to allow all participants to adhere to as a minimum. Adhering to industrial standards leads to avoiding many chances of failure. Everyone can easily develop knowledge about a common specification rather than interpreting endless numbers of individual company specifications. However, companies may be forced to move beyond the standards for various reasons, as their designs need to advance further than the scope defined by the standards.
Users evaluate PCB quality based on their use in products falling into three categories, called classes. These are:
Class 1: General Electronic Products, such as consumer electronic product
Class 2: Dedicated Service Products, such as those providing uninterrupted service
Class 3: High Reliability Products, such as those providing continuous service
Typically, manufacturers determine the class appropriate for their product. For instance, if a toy manufacturer wants PCBs that meet class 3 requirements, they must be willing to pay for the extra level of reliability.
Internationally, the IPC-6011 standard defines the generic performance specifications for PCBs. According to IPC-6011, the supplier of the PCB is responsible for verification of compatibility with the specifications, master drawings and patterns, and the specific manufacturing facilities and processes. In short, the supplier must ensure the PCB meets the requirements of the procurement documentation.
By default, the IPC-6011 standard applies to all circuit board types. However, this needs to be supplemented by performance specifications containing the requirements of the chosen technology such as:
IPC-6012: for Rigid PCBs
IPC-6013: for Flexible (Flex) PCBs
IPC-6014: for PCMCIA PCBs
IPC-6015: for MCM-L PCBs
IPC-6016: for HDI PCBs
IPC-6017: for Microwave PCBs
Although IPC-6012 is the most common specification used in documentation packages, manufacturers can specify the requirements according to the PCBs their electronic products use.
Acceptability of PCBs
Sometimes, it may be impossible to establish criteria for non-conformance from descriptions alone, such as from IPC-6012 and others. To circumvent this, the standard IPC-A-600 has been developed, which contains illustrations and photographs, and offers three levels of quality for each specific characteristic: Target, Acceptable, and Non-Conforming Conditions. Furthermore, the characteristics are divided into two general groups:
Externally Observable Conditions: these are features or imperfections visible on the exterior surface of the board and it is possible to evaluate them.
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Fig.2: Illustration of Void within a Via
Fig. 2 is the image of a copper plating acceptable for a product of class 2. The acceptance criteria for the plating are:
  • Not more than one void in any hole
  • Not more than 5% of the holes have voids
  • Any void is not greater than 5% of the length of the hole
  • The void is less than 90 of the circumference of the hole
Internally Observable Conditions: these features or imperfections can only be detected, examined, and evaluated after a micro sectioning of the PCB.
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Fig.3: Micro-Section of a Via Hole
Fig. 3 is the image of a plated hole, showing in micro-section the thickness of copper and insulating layers, along with highlighting of material imperfections, if any.
The thickness of copper and insulation layers must match those specified in the design documents. Overall thickness of the board is also an important criterion.
Typically, such micro-sections are performed on coupons with the same characteristics as possessed by the actual board design. This avoids destroying a good board while testing.
General Defects in PCBs and Their Effect on Assembly
Board Warpage: If the board is not perfectly flat, it can cause several problems in the assembly process. This could be a local change in the PCB thickness or an issue of coplanarity of the PCB. It can result in potential opens from tilted components known as the teeter-totter effect, or from dropped solder connection, such as with a BGA joint. A solder joint may also potentially lose reliability from stretching. In general, leadless devices are more susceptible to PCB warpage.
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Fig.4: Ball Drop & Stretched Joints
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Fig.5: Effect of Warpage on Leadless Devices
With a warped board, there may also be an issue with controlling the volume of paste deposition, both for solder paste and adhesive. Warpage usually results in the stencil being unable to sit flat all over on the PCB surface, leaving gaps in between the stencil and board in certain areas. While this may result in uneven printing of solder paste across the board, there may be insufficient adhesive dispensing or adhesive may be skipped altogether in those areas.
While printing, gaps between the stencil and board may fill up with solder paste. This may cause a smear, wet bridge, or excess deposit of solder paste. Sometimes, paste fringing on the stencil after printing may cause unnecessary smears on the next print.
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Fig.6: Unsoldered Leads
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Fig.7: Tombstoned Passive Component
Uneven deposition of solder paste may result in insufficient volume being present, showing up as solder covering the pad, but with metallization showing through. As there is insufficient paste to touch the component leads, it results in unsoldered leads after reflow. For small packages, which usually decrease the total tolerance of PCB and assembly process, this may also lead to paste misalignment, resulting in cocking or tombstoning of passive chip components, impacting process yields.
During waves soldering, if via holes are unfilled and the board has warpages, the assembly can potentially lift off the wave, resulting in areas remaining unsoldered.
Solder Mask Issues: Improperly applied solder mask may cause reliability issues during assembly. One of the major issues is the missing solder mask dam between two neighboring solder pads, leading to a potential solder short or bridging during a wave soldering operation.
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Fig.8: Missing Solder Mask Dam
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Fig.9: Shifted Solder Mask
Normally, the solder mask is required to cover a pad all around. If there is a shift or misregistration, the solder mask may not cover the land fully, and form a pocket next to the land, exposing the neighboring pad or track. This area can subsequently fill with solder paste and create a whisker or bridge shorting the pads with the neighboring pad or track.
Another reliability issue arising from improperly applied solder mask is a smear on the pad itself causing solderability issues. This prevents solder from wetting the smeared land properly during reflow or wave soldering, leaving the pad non-solderable.
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Fig.10: Solder Mask Smear on Pad
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Fig.11: Solder Ball
 
If the solder mask remains under-cured, it can lead to product reliability issues, as areas of under-cured solder mask can trap processing residues and contribute to electrical leakages or to electromechanical migration failures. Improperly cured solder resist may also allow solder to accumulate in the form of balls during wave soldering, leading to potential electrical shorts.
Issues with HAL Boards: Non-coplanar or uneven solder surfaces are a major issue for HAL finish boards. A very thin coating of HAL may lead to migration after the first reflow operation, exposing copper and leading to poor solderability in subsequent reflows.
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Fig.12: Uneven HAL Solder
 
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Fig.13: Thin HAL Coating
 
As stencil openings normally do not match the pad perfectly, some parts of the stencil may rest on the excess solder deposit, leaving the other area of the stencil lifted away from the board. This allows solder paste to squeeze into the gap between the stencil and the board, creating issues similar to those on boards with a warpage.
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Fig.14: Solder Bridge
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Fig.15: Grainy Solder Joint
Non-coplanarity of HAL boards may also lead to bumps of solder being left on pads causing the stencil to lift up and solder paste filling the underneath gap. During reflow, the excess solder may cause adjacent lands to bridge or whiskers to form between adjacent fine-pitch components. The flux in the solder paste may not be adequate for the total amount of solder from the paste and that left on the pad by the HAL process, and this may result in a grainy or disturbed joint.
Conclusion
The PCB being an electromechanical item in a product has many opportunities for failure. PCB quality is a huge subject with numerous possibilities for imperfections affecting assembly and the product life cycle. Starting from warping of the PCB surface to via failure to under-etching of traces, each aspect of PCB quality can bring the product to an abrupt halt much before its intended life cycle is over.
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RF Design and High Frequency Board Manufacturing

The performance of a product operating at high frequencies depends largely on the electrical characteristics of the Printed Circuit Board (PCB) used for mounting and connecting its circuit components. The magnitude of the impact of the PCB design increases exponentially with increase of the operational frequency. Therefore, designers need to include electrical models of PCB structures when simulating RF circuits. For achieving optimum solutions, the product/PCB designer and the manufacturing engineer must appreciate the requirements of RF design.
Designing for High Frequencies
Designing a board to work at high frequencies requires the designer to be critical of the following areas:
  • Material used for the PCB
  • Placement of traces
  • Placement of planes
  • Component interconnections

Materials Used for RF PCBs

RF PCBs can use a variety of different materials. Although common board materials used for high frequency circuits are FR-4 and derivatives of FR-4, many other base substrates are also used as they offer better electrical performance. These include specialized low-loss RF material such as pure PTFE, ceramic filled PTFE, Hydrocarbon Ceramic, and High-Temperature Thermoplastic/Ceramic.
Although FR-4 has its limitations when used for high-frequency work, the RF designer must understand these limitations and make cost/performance tradeoffs for the design. Typical limitations of FR-4 are:
  • Stability of dielectric constant—Varying from lot to lot and over frequency
  • Loss factor—Depending on surface contamination and the hygroscopic nature of the material
  • Ability to withstand processing temperatures—Lead-free processing temperatures are higher than regular soldering temperatures
  • Thermal conductivity—Even low-power RF circuits can produce a lot of heat

Therefore, selecting a suitable material for making a PCB operating at high frequencies depends on the above factors and the product cost. The choice could range from the low-cost FR-4 material, with its higher loss and not tightly controlled dielectric constant, to FR-4 derivatives with better specifications, or to other specialized low-loss RF material with their well-specified dielectric constant.

Fabrication Issues with Special Materials
 
All laminates mentioned above involve individual fabrication issues. For achieving the proper quality and reliability, the manufacturer must follow these individual fabrication notes for each substrate material for storing, handling, preparing the inner layer, surface preparation for photoresist application, bonding, drilling, deburring, and plating.
Manufacturers require setting up special processes for fabricating PCBs with low-loss RF materials to work at high frequencies. For instance, plated-through hole preparation is very critical for PTFE substrates—it needs an etch-back process requiring Plasma etch setup to prepare the PTFE hole surface and make it capable of accepting electroless copper plating. Therefore, apart from proper selection of material, following the proper fabrication methods is equally important for achieving a good quality PCB working reliably at high frequencies.
Placement of Traces
For matching the impedance, designers effectively manage the spacing of traces, ground planes, and the dielectric material to form a controlled impedance transmission line. They do this in several ways—in the form of a microstrip, stripline, co-planar waveguides, and differential pairs. The width of the trace, the dielectric thickness, dielectric constant of the used dielectric material and copper thickness determine the impedance. As high frequency signals are very sensitive to noise, ringing, and reflections, they must be designed with great care towards impedance. Mostly preferred impedance is 50 ohms for single ended and 100 ohms for differential, with control limits of ±10%.
                                                               Fig.1: Microstrip
                                                         Fig.2: Centered Stripline
                                                               Fig.3: Off-Center
Microstrip: This is a circuit trace carrying the RF signals routed on an outside layer of the PCB with a reference plane below it. The reference plane may be power or ground plane.
Stripline: This is a circuit trace carrying the RF signals routed on an inside layer of the PCB with two low-voltage reference planes above and below it. The reference planes may be power and or ground plane. The stripline can be equidistant from the two reference planes, in which case it is called the centered stripline, or it can be an off-center stripline, where it is closer to one of the reference planes.
                                                               Fig.4: Coplanar
                                              Fig.5: Coplanar Waveguide with Ground
Co-planar Waveguide: This is a circuit trace carrying the RF signals embedded within a ground reference plane on the same layer of the PCB. Co-planar waveguides (CPW) offer lower loss tangent than microstrips do, but have a higher skin effect loss, as fields concentrate on the edges of the trace and ground. Another form of co-planar waveguide is the co-planar waveguide with ground (CPWG), where a ground plane is placed just below the waveguide layer.
                                                    Fig.6: Coplanar Differential Pair
                                                  Fig.7: Coplanar Differential Pair with
 
Co-planar Differential Pairs: These are two traces carrying the RF signals embedded within a ground reference plane on the same layer of the PCB. This arrangement is also called the CP Differential Pair or Edge-Coupled CPW. This gives an extra degree of signal-to-noise isolation over the standard CPW. An added ground plane just below the layer offers even better field containment over the coupled CPW, and is called the Edge Coupled CPWG.
Placement of Planes
Most RF products use multilayer PCBs. These comprise a number of laminates of the substrate material separately etched, drilled, and bonded. The chief advantage of this is to allow the use of more than two conductor layers, thereby reducing the required board space, but at increased cost.
Setting up the laminates is a major part of the design for a multilayer RF board. The stack defines the number of layers the board will ultimately possess. At this stage, it is important to define the layers carrying specific high-speed tracks, and the placement of the ground and power layers with respect to those layers. Enclosing tracks carrying high frequency signals within the ground and power layers serves to define two significant factors related to high speed multilayer design—minimizing cross-talk, and maintaining a check on the impedance on the board. However, the cost of the board increases proportional to the number of layers it has, and therefore, the number of layers is usually a compromise of the board’s functionality and its cost.
RF products typically use a four or six layer FR-4 multilayer construction. Drilled and plated through holes or vias link tracks on one layer to tracks on other layers or all layers. Complex structures use blind or buried vias, with blind vias connecting the outermost layers to one or more inner ones, while buried vias connect only the inner layers and do not appear on the outermost layers. The third type of via is the through via, going through all the layers of the board. To create the connections, it is necessary to drill and then plate-through all vias. Via structures have a major effect on the fabrication processes of the PCB and contribute to the cost of the finished board.
Component Interconnections
Parasitic elements of a PCB refer to its physical attributes that affect the performance of the circuit. For instance, at high frequencies, a long thin track will usually be inductive, while a large pad over a ground plane will behave like a capacitor. In addition, when modeling in real circuits for, say a series capacitor, the designer must also include the impedance of the connections between the ground plane and circuit components.
A plated through via hole also adds significant inductance. RF designers can use good circuit simulation packages that include models to allow their addition. For instance, the typical inductance of a 0.2 mm diameter, 1.6 mm long hole can be as much as 0.75 nH. Although this may seem to be small, it can exert significant influence at high frequencies.
Components mounted on the PCB also contribute with their non-ideal characteristics. The use of Surface Mount Device (SMD) components helps to reduce the effect largely because of their reduced lead lengths and small construction, but the effect is still prominent at higher frequencies.
Designers use different ground plane strategies for their RF PCB design, and there is no unique solution as the best strategy. While most designers advocate breaking up the ground plane over the analog, digital, radio, and audio parts of the circuit, providing an individual ground plane of low impedance for all parts of the circuit is usually a good point to start.
Designers need to consider the flow of currents carefully throughout the product to minimize interferences between the audio and radio circuits. This assumes even greater significance if the design uses Digital Signal Processing (DSP) and microprocessors.
RF PCB Layout Strategies and Techniques
  • Separate all RF, low-level analog,  and digital sections.
  • Divide the RF section into circuit groups (amps, LO, VCO, etc.).
  • Place all the high-frequency components early in the layout, as this helps to minimize the length of the RF routes (in RF PCBs, functional orientation is more important compared to DFM).
  • Place the components carrying the highest frequency next to the connectors.
  • Never place unrelated inputs and outputs next to each other. For instance, multi-stage windings should never be placed adjacent.
  • When long input or output to RF amplifiers is unavoidable, choose to make the output longer.
  • As the trace impedance is a critical factor when trying to control reflections, always match the impedance between the driver and the load, except where the trace is shorter than 1/20th of the wavelength.
  • When using pull-up inductors or resistors at the outputs of open-collector devices, always place the pull-up component next to the output pin it is pulling up.
  • In addition to decoupling the main power pins of the IC, decouple the pull-up also.
  • Inductors usually have large magnetic fields around them-
    • Never placed them close together, when in parallel (unless the intention is to couple their magnetic fields)
    • Separate all inductors by 1x times the body height (minimum) OR
    • Place inductors perpendicular to one another
  • Confine “ALL” routes to the section or stage to which they are assigned –
    • Digital traces in the digital section
    • Low-level analog traces in the low-level analog section
    • RF traces in the RF section
    • Routing traces into adjoining sections is not recommended
  • Route all short RF traces on the component side of the PCB, rout them to eliminate vias
  • Place a ground layer below the RF traces.
  • Minimize the vias in the RF path, as this reduces the breaks in the ground plane(s) and –
    • Minimizes inductance
    • Helps contain stray magnetic and electric fields.
  • Long controls lines are acceptable, but take care to route them away from RF inputs.
  • Keep RF lines away from one another by a minimum distance to avoid unintended coupling & crosstalk.
  • Minimum spacing is a function of the acceptable level of coupling, and is good for crosstalk, directional couplers, crosstalk, differential lines coupled in even or odd modes.
Summary
Finally, the design of a PCB and its fabrication for high frequency use is a complex process requiring intimate communication between the designer and the fabricator, with each understanding the issues related to high-speed design.
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